已知时钟信号clkin的频率为50MHz的方波信号,下面clkout的频率为( )。module function(rst, clkin, clkout);input clkin, rst;output clkout;reg clkout;reg[2:0] cnt;always @(posedge clkin or negedge rst)begin if(!rst) begin cnt<=3'd0; clkout<=1'b0; end else if (cnt>=3'd4) begin cnt<=3'd0; clkout<=~clkout; end else cnt<=cnt+1'b1;endendmodule